VERILOG		= iverilog.exe
VCDWAVE		= vvp.exe
WAVESIM		= gtkwave.exe

RM		= del

DIR		= ./
TARGET	= testwave
VCDTAR	= testwave.vcd
VHDTAR 	= testwave.vhd
VFLAGS	= -g2005-sv

SOURCE = core2.v test3.v

LOG	   = log.txt

.PHONY:all build run runlog vhdl vpi clean

all: build

build: $(TARGET)

$(TARGET): $(SOURCE)
	$(VERILOG) $(VFLAGS) -o $@ -y $(DIR) $(SOURCE)

run: $(VCDTAR)
	$(WAVESIM) $<

runlog: $(TARGET)
	$(VCDWAVE) -n $< -lxt2 > $(LOG)

$(VCDTAR): $(TARGET)
	$(VCDWAVE) -n $< -lxt2

vhdl: $(VHDTAR)

$(VHDTAR): $(SOURCE)
	$(VERILOG) -tvhdl -o $@ -y $(DIR) $(SOURCE)

vpi:
	iverilog-vpi.exe -mingw=D:\\mingw -ivl=C:\\iverilog hello.c

clean:
	$(RM) $(VCDTAR) $(VHDTAR) $(TARGET)
